Based on the programmability of the devices non-volatile memories are categorized as follows. Writing data into ROMs is possible only at the time of manufacturing the devices and used only for reading the data stored. Even though these devices are less in cost the constraint that they are to be programmed at the time of manufacturing is an inconvenience. PROM devices are one time programmable ROM. At the time of device manufacturing every cell is stored with "1" and can be programmed by customer once. But, single write phase makes them unattractive. For instance, a single error in the programming process or application makes the device unusable.
EPROM is Erasable PROM. Multiple times programming feature is added in EPROM. In this case, first whole memory is to be erased by shining ultraviolet light. The erase process is slow and can take from seconds to several minutes, depending on the intensity of the UV source. Programming takes several (5-10) μs/word. EPROM cell is extremely simple and dense, making it possible to fabricate large memories at a low cost. EPROMs were therefore attractive in applications that not require frequent programming. Electrically-Erasable PROM (EEPROM) can be erased without removing from board, unlike in UV erasable where memory must be removed from the board. The voltage approximately applied for programming is 18V. In addition, it is a reverse process; means by applying high negative voltage at gate can erase the cell. Another advantage over EPROM is that EEPROM can be programmed for 105 cycles.
Flash Electrically Erasable PROM Technically the Flash EEPROM is a combination of the EPROM and EEPROM approaches. The main difference is that erasure can be performed for the complete chip, or for a sub-section of the memory. The control circuits on the memory chip can be regularly checked for the value of the threshold during erasure, and the erasure time can be adjusted dynamically. Flash technology has three basic weaknesses. First, its bulk erase nature prevents the use of normal byte-oriented update. Second, Based on the architecture used write and erase operations take different time and consume more power than read. Finally, each flash-memory block has a limitation on the erase cycle count.
Although transistors are used for realization of Read Only Memory, the functioning of Rom can be easily understood by diode matrix network depicted in Fig. 1. In this network, whichever switch is closed, those diodes will conduct and the output will be high (logic 1), sections where there is no diode connected there will be no current flowing and the output will be low (logic 0). For instance, when switch S5 is closed, the diodes D6 and D7 are on and therefore both output 1 and output 3 are at logic 1 and both output 2 and output 4 are at logic 0. Hence the corresponding binary number is 0101 and its decimal value is 5.
The disadvantage of a diode cell is that it does not isolate the bit line from the word line. For better isolation the diode can be replaced by gate-source connection of a NMOS transistor. Moreover, in order to achieve the programmability i.e. for multiple read write capability a modified transistor known as Floating Gate (FG) Transistor is employed. The structure is similar to a traditional MOS device, except that an extra gate is inserted between gate and channel. The threshold voltage of the FG is programmable and corresponding to its different values the level 0 and level 1 can be identified.
Fig. 1 : A Diode ROM Matrix
Flash memory cells can be arranged in two popular architectures; the NOR and the NAND architectures as explained in the following sections.
Post a Comment