ECEstream: Transistors

Bipolar Junction Transistor Circuit Configurations

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A transistor (BJT) is a three-terminal device ( having three terminals namely emitter, base and collector) but we require four terminals - two for the input and two for the output for connecting it in circuit. Hence one of the terminals of the transistor is made common to the input output circuits. Thus there are three types of configurations for operation of a transistor. These configurations are <i>common base </i>(CB), <i>common emitter</i> (CE) and <i>common collector</i> (CC) configurations. The term common is used to denote the electrode that is common to input and output circuits. Since the common terminal is grounded, these configurations are also referred to as grounded base, grounded emitter and grounded collector configurations, as shown in <i>Figure 1</i>. Each configuration has its own merits and demerits. It is to be remembered that regardless of the circuit configurations, the emitter is always forward biased and the collector is always reverse biased.<br />
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<img alt="Circuit Configurations for NPN Transistor" border="0" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEigYBt2iLTN-v-byFqlAzLQjSAPebpUoiyVsucOWmlxe62-6jxDDaxd7y7uv6SmT41CwRhjOIRQQvKUv2VtcG0Rj3Yu0uBDjJMk7NN9xzFjKiYIfFkiDUeMPcSy8-OSb4S4hbrA1L8haT43/s1600/BJT+Configurations.png" title="Circuit Configurations for NPN Transistor" /></div>
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<b>NPN Common Base Amplifier</b></div>
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This configuration is used for high frequency applications because the base separates the input and output, minimizing oscillations at high frequency. It has a high voltage gain, relatively low input impedance and high output impedance compared to the common collector.</div>
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<img alt="NPN Common Base Amplifier" border="0" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgkpnCQWzg-DHSXI4GjFZ3wcUjof3nxsw6zZAZc3YoB54mhyJ45h2HPy3hyphenhyphenxHaNc53iKGRuaLT8mAN6ckMr7NJFeFFkKI_SbRKtkY1fq4fW-U5yCiy5-uzE9e5GUADGXjeE7fhvylE05ppq/s1600/npn+common+base.png" title="NPN Common Base Amplifier" /></div>
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<b>NPN Common Emitter Amplifier</b></div>
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The common emitter configuration lends itself to voltage amplification and is the most common configuration for transistor amplifiers.</div>
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<img alt="NPN Common Emitter Amplifier" border="0" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEiAgNzRZ7FmBKBVuDMoFeSF7VqVihPr2lzp-lRELjpyCr1bbqkNFgTfM1U_OUoIRtP2zTsWnOyZJMb_HPWBAh0PjBF4tberIv_g7CAug0YdMh8LXWkgOqZBASRzf4NLdFo6AmYJH-XXYIOY/s1600/npn+common+emitter.png" title="NPN Common Emitter Amplifier" /></div>
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<b>NPN Common Collector Amplifier</b></div>
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The common collector amplifier, often called an emitter follower since its output is taken from the emitter resistor, is useful as an impedance matching device since its input impedance is much higher than its output impedance. It is also termed a "buffer" for this reason and is used in digital circuits with basic gates.</div>
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<img alt="NPN Common Collector Amplifier" border="0" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhQN3QLvYOiW7Yp3umiuGloKR_Rl-7zJgKvAx2KYcHc0_yqfIwyMdbU4zvS_ZYxp2QuqkTyHuryYKTDPUZntyKNmk_pOn3OawWQBkkxy7Uzixl8yPuokqI2bVhGkfeSCWx-TtPeJOy7gswV/s1600/npn+common+collector.png" title="NPN Common Collector Amplifier" /></div>
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Bipolar Junction Transistor Circuit Configurations

A transistor (BJT) is a three-terminal device ( having three terminals namely emitter, base and collector) but we require four terminals -...

Bipolar Junction Transistors (BJTs)

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<b><u><span style="color: red;">Introduction</span></u></b></h4>
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The transistor is a solid state device, whose operation depends upon the flow of electric charge carriers within the solid. Transistor is capable of amplification and in most respect it is analogous to a vacuum triode. The main difference between the two is that the transistor is a current controlled device whereas vacuum triode is a voltage controlled device. The transistor replaced vacuum tubes in almost all applications. The reasons are obviously its advantages over vacuum tubes such as compact size, light weight, rugged construction, more resistive to shocks and vibrations, instantaneous operation (no heating required), low operating voltage, high operating efficiency (no heat loss) and long life with essentially no ageing effect if operated within permissible limits of temperature and frequency. However, transistors, in comparison to vacuum triodes, have some drawbacks also such as loud hum noise, restricted operating temperature (up to 75<sup><span style="line-height: 115%;"><span style="font-family: inherit; font-size: x-small;">o</span></span></sup>C) and operating frequency (up to a few MHz only).</div>
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<img alt="Symbol of NPN & PNP Transistor" border="0" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEg7VCbnZb_q8mAuzImUQ1KBlVLfC0hHS9t4IFtlg49XYShqa3_cQoUiWwMaYLCklsyG6Ns0foFB4HjnNwj6shGWZLVwdeLK-Y9_FVgqDTeQviEKP1XGeHlMmNszXKS0maxEwgS8DNA5DWcL/s1600/NPN+and+PNP+transistors+symbol.png" title="Symbol of NPN & PNP Transistor" /></div>
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It consists of a silicon or germanium (preferably silicon because of its smaller cutoff current <span style="font-size: 12pt; line-height: 115%;"><span style="font-family: inherit;">I<sub>CBO</sub></span></span>, smaller variations in <span style="font-family: inherit;"><span style="font-size: 16px; line-height: 18.3999996185303px;">I</span><sub style="line-height: 18.3999996185303px;">CBO</sub></span> due to variations in temperature and higher operating temperature) crystal in which a layer of N-type material is sandwiched between two layers of P-type material, as shown in Figure 1 (a). Alternatively a transistor may consist of a layer of P-type material sandwiched between two layers of N-type material sandwiched between two layers of N-type material as shown in Figure 1 (b). In the former case the transistor is referred to as a P-N-P <i>transistor</i> and in latter case, as an N-P-N <i>transistor</i>. Each type of transistor has two P-N junctions - one junction between the emitter and base, called the <i>emitter-base junction</i> or simply the <i>emitter junction</i> and the other junction between the base and collector, called the <i>collector-base junction</i> or simply the <i>collector junction</i>. Thus a transistor is like two P-N junction diodes connected back to back. The two junctions give rise to three regions provided with three terminals called the <i>emitter</i>, <i>base</i> and <i>collector</i>, as shown in Figure 1. The emitter, base and collector correspond in a general way to the cathode, grid and plate or anode of a vacuum triode.</div>
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<b><u><span style="color: red;">Transistor Terminals</span></u></b></h4>
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As mentioned earlier , transistor is a single crystal in which there are two P-N junctions as shown in Figure 1. The idea behind is to have first section to supply the charges (either holes or electrons) to be collected by the third section through middle section. One side section supplying free charges is called the <i>emitter</i>, other side section collecting these charges is called the <i>collector</i> and the middle section which is formed between the emitter and collector is called the <i>base</i>.</div>
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<b>1. <i>Emitter:</i></b> It is left hand section (or region) of the transistor and its main function is to supply majority charge carriers (electrons in case of N-P-N transistors and holes in case of P-N-P transistors) to the base. The emitter is always forward biased biased w.r.t. base so that it is able to supply majority charge carriers to the base. The emitter is heavily doped so that it may able to inject majority charge carriers. It is of moderate size in order to maintain heavy doping without diluting it or mesh formation in it.</div>
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<b>2. <i>Collector:</i></b> It is the right hand section of the transistor and its main function is to collect majority charge carriers. Collector is always reverse biased so as to remove the charge carriers away from its junction with the base. It is moderately doped to avoid the chances of mesh formation even after taking the carriers from the emitter. Large in size to withstand the temperature generated at the collector.</div>
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<b>3. <i>Base:</i></b> It is the middle section of the transistor and is very lightly doped to reduce the recombination within the base so as to increase the collector current and is very thin (of the order of <span style="font-size: 12pt; line-height: 115%;"><span style="font-family: inherit;">µ</span></span>m) in comparison to either emitter or collector so that it may pass most of the injected charge carriers to the collector.</div>
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<b><span style="color: red;"><u>Transistor Action or Working</u></span></b></h4>
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Transistors of both types (P-N-P and N-P-N) behave exactly the same way except change in biasing and majority carriers. In P-N-P transistors the conduction is by holes whereas in N-P-N transistors conduction is by electrons. However, NPN transistors are preferred due to their high frequency response. Basic connections and biasing for N-P-N and P-N-P type transistors are shown in Figure 2 (a) & (b) respectively. <b>Let us discuss an <i>N-P-N</i> transistor, which is in common use.</b><br />
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<img alt="Basic Connections of NPN Transistor" border="0" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEjlYjc_-hPPv95SKxnSSvsz9dZGH5pWhRr-0f9yEtrx4JGx64D-dZtTKPV7jVEIlRhcnwl3yQAM8Svk8dhYZqg7m9Y7EDTcWGbPKSm1JCcfaz1nZb9iHaboL_pomkwJ_1HOeFIC33PDE7aH/s1600/NPN+Transistor.png" title="Basic Connections of NPN Transistor" /></div>
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The emitter is forward biased and as a result a large forward current flows across the emitter junction due to flow of majority carriers i.e., electrons from the emitter region enter the base region and holes from base region into the emitter region. However, since the conductivity of emitter region is larger than that of base region, the electrons from the emitter region out the number of holes from the base region. It may be assumed with good accuracy that forward current in the emitter junction flows due to the movement of electrons from the emitter region to the base. We can, therefore, say that electrons from the emitter region due to forward bias in the emitter junction cross into the base region where electrons are in minority. Injection of electrons makes the electrons concentration on the emitter junction very large and on the collector junction the concentration of the electrons is extremely small and as such the gradient of electrons concentration is very large in base. Injected electrons diffuse into collector region due to extremely small thickness of base which is much less than the diffusion length. Most of the electrons cross into the collector region. Collector is reverse biased and creates a strong electrostatic field between base and collector. The field immediately collects the diffused electrons which enter the collector junction. Flow of electrons into the base region when confronted with the holes, a few electrons (say 1 to 10%) combined and neutralize and rest of the electrons say 90 to 99% of the injected electrons diffuse into the collector region and collected by the collector electrode. To maintain the base neutrality base electrode provides equal number of electrons which have combined with holes and results in a base current. Thus the emitter current <span style="font-size: 12pt; line-height: 115%;"><span style="font-family: inherit;">I<sub>E</sub></span></span> is equal to the sum of collector current <span style="font-size: 12pt; line-height: 115%;"><span style="font-family: inherit;">I<sub>C</sub></span></span> and base current <span style="font-size: 12pt; line-height: 115%;"><span style="font-family: inherit;">I<sub>B</sub></span></span>. The ratio of collector current <span style="font-size: 12pt; line-height: 115%;"><span style="font-family: inherit;">I<sub>C</sub></span></span> to emitter current <span style="font-size: 16px; line-height: 18.3999996185303px;">I</span><sub style="line-height: 18.3999996185303px;">E</sub> is called the <span style="font-family: "Verdana","sans-serif"; font-size: 12.0pt; line-height: 115%; mso-ansi-language: EN-US; mso-bidi-font-family: "Times New Roman"; mso-bidi-language: AR-SA; mso-bidi-theme-font: minor-bidi; mso-fareast-font-family: Calibri; mso-fareast-language: EN-US; mso-fareast-theme-font: minor-latin;">α</span> and it is measure of the possible current amplification. In a transistor a cannot be higher than unity, but practical values of 0.95 to 0.99 are attained in commercial transistors.<br />
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For connecting batteries properly in the transistor circuits like following scheme may be remembered.<br />
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The battery polarities to the emitter and base are the same as the letter of the emitter ans base are the same as the letter of the emitter and base are impurity designations. Thus, in the P-N-P type, the emitter receives the P (positive) terminal, and base receives the N (negative) terminal. Similarly, in N-P-N type, the emitter receives the N (negative) terminal, the base receives the P (positive) terminal. The collector receives a battery polarity opposite to its impurity type designation, Thus P-type collector receives the N (negative) terminal of the battery and the N-type collector receives the P (positive) terminal.<br />
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<img alt="Basic Connections of PNP Transistor" border="0" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhgN2pIx3vA-_0njcWczWP4ipaPWcsmq7pYHbAILmbStXP_nN3V-ja9I-1WxEz4GhEIzUWuDXhfrpDTFzsN_1z7ICRCMZMmtJZyqbREx10vzPGT4ny3PIq_cTviV3rr-q0roNOWFu-qdmQE/s1600/PNP+transistors.png" title="Basic Connections of PNP Transistor" /></div>
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<b>Operation of P-N-P Transistor:</b> The P-N-P transistor behaves exactly the same way as an N-P-N device, with the exception that the majority charge carriers are holes. As illustrated in Figure 2 (b), holes are emitted from the P-type emitter across the forward-biased emitter -base junction into the base. In the lightly doped N-type base, the holes find few electrons to recombine with. Some of the holes flow out via the base terminal, but most are drawn across the collector by the positive-negative electric field at the reverse-biased collector-base junction. As in the case of N-P-N device, the forward bias at the emitter base junction controls the collector and emitter currents.</div>
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Bipolar Junction Transistors (BJTs)

Introduction The transistor is a solid state device, whose operation depends upon the flow of electric charge carriers within the soli...

Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs)

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The <b>Metal Oxide Semiconductor Field Effect Transistor</b> or <b>MOSFET</b> is one of the most widely used electronic devices, particularly in digital circuits. Since it is constructed with the gate terminal insulated from the channel, it may referred to as an <b>Insulated Gate Field Effect Transistor</b> (<b>IGFET</b>). However, since most of the devices are made using silicon for the semiconductor, SiO<span style="font-family: Georgia, Times New Roman, serif;">2</span><span style="font-family: inherit;"> for the insulator, and metal for the gate electrode, the term Metal Oxide Semiconductor Field Effect Transistor or simply MOSFET.</span></div>
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<tr><td class="tr-caption" style="text-align: center;"><i><b>Fig.  N Channel Mosfet</b></i></td></tr>
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<span style="font-family: inherit;">Like, a JFET, a MOSFET is also a three terminal (source, gate and drain) device and drain current in it is also controlled by gate bias. The operation of MOSFET is similar to that of JFET and, therefore, all the equations apply equally well to the MOSFET and JFET in amplifier connections. However, MOSFET has lower capacitance and input impedance much more than that of a JFET owing to small leakage current. In case of a MOSFET the positive voltage may be applied to the gate and still the gate current remains zero.</span></div>
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<span style="font-family: inherit;">MOSFETs are of two types namely (i) </span><b style="font-family: inherit;">enhancement type MOSFET</b><span style="font-family: inherit;"> or </span><b style="font-family: inherit;">E-MOSFET</b><span style="font-family: inherit;"> and (ii)</span><b style="font-family: inherit;">depletion enhancement MOSFET</b><span style="font-family: inherit;"> or </span><b style="font-family: inherit;">DE-MOSFET</b><span style="font-family: inherit;">. In the depletion-mode construction a channel is physically constructed and current between drain and source is due to voltage applied across the drain-source terminals. The enhancement MOSFET structure has no channel formed during its construction. Voltage is applied to the gate, in this case, to develop a channel of charge carriers so that a current results when a voltage is applied across the drain-source terminals.</span><br />
<span style="text-align: left;"><br /></span><span style="text-align: left;">The enhancement type MOSFET (E-MOSFET) is widely used in both discrete and integrated circuits. In discrete circuits, the main use is in power switching, which means turning largest currents on and off. Although their use is declined, depletion-mode MOSFETs (DE-MOSFETs) are still found in high-frequency front-end communication circuits as RF amplifiers.</span></div>
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<b>DEPLETION-ENHANCEMENT MOSFETs (DE-MOSFETs)</b></h4>
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Figure 1.1 shows the construction of an N-channel DE-MOSFET. It consists of a lightly doped P-type substrate into which two blocks of heavily doped N-type material are diffused forming the source and drain. An <b>N-channel</b> is <b>formed by diffusion between the source and drain</b>. This type of impurity for the channel is the same as for the source and drain. Now a thin layer of Si<span style="font-family: Calibri, sans-serif; font-size: 13.5pt; line-height: 20.7000007629395px;">O</span><sub style="font-family: Calibri, sans-serif; line-height: 15.3333320617676px;">2 </sub>dielectric is grown over the entire surface and holes are cut through the SiO<span style="font-family: Calibri, sans-serif; font-size: 13px; line-height: 15.3333320617676px;">2</span> (silicon dioxide) layer to make contact with the N-type blocks (Source and Drain). Metal is deposited through the holes to provide drain and source terminals, and on the surface area between drain and source, a metal plate is deposited. This layer constitutes the gate.</div>
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A P-channel DE-MOSFET is constructed like an N-channel DE-MOSFET, starting with N-type substrate and diffusing P-type drain and source blocks and connecting them internally by a P-dopped channel region.<br />
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<img alt="N-Channel DE-MOSFET Structure" border="0" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhPIDDLaFiFkrxBIBYPZ-Vft0Ja361DX4YOoFW4aSM5sdrzE5bMz6T4V3NdJO9F4qHVkCYmoXljblalgXrEqhPy82Ji3nweKtdFDLm0IRZsF9odbZBbwvrtRwLlsUdZgNJpFhPExhdaFqdd/s1600/N-Channel-DE-MOSFET-Structure.jpg" title="N-Channel DE-MOSFET Structure" /></div>
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<b>OPERATION</b></div>
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It is obvious from Fig. 1.1 that there is no P-N junction between gate and channel. Here the diffused channel N, the insulating dielectric SiO layer and the metal layer of the gate forms a parallel plate capacitor. DE-MOSFET can be operated with either a positive or a negative gate. When gate is positive with respect to the source it operates in the enhancement or E-mode and when the gate is negative w.r.t. the source, as illustrated in Fig. 1.3, it operates in depletion-mode.<br />
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<img alt="Depletion Mode Operation" border="0" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEg5kaEbj8ToBwCO44cYh4n4SquEdTLTAOTWBxzbZudor7hJn2l7vwdLhQASLSW83FOyfSi0VuJU3rwXpSt3zHkQcI4oY38DhWvd5dfZv4_-UeGiweD2ecp7xHah1Mi14BPtXB6FuRW3jmFv/s1600/Depletion-Mode-Operation-DE-MOSFET.jpg" title="Depletion Mode Operation" /></div>
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When the drain is made + ve with respect to the source, a drain current will flow, even with zero gate potential and the MOSFET is said to be operating in E-mode. In this mode of operation gate attracts the - ve charge carriers from the P-substrate to the N-channel and thus reduces the channel resistance and increases the drain current. The more positve the gate is made, the more drain current flows.</div>
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On the other hand when the gate is made - ve with respect to the substrate, the gate repells some of the - ve charge carriers out of the N-channel. This creates a depletion region in the channel, as illustrated in Fig. 1.3, and, therefore, increases the channel resistance and reduces the drain current. The more - ve the gate, the less the drain current. In this mode of operation the device is referred to as a <i>depletion-mode MOSFET</i>.</div>
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<b>CHARACTERISTICS</b></div>
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Typical <b><i>drain characteristics</i></b>, for various levels of gate-source voltage, of an N-channel MOSFET are shown in Fig. 1.4. The upper curves are for positive <span style="font-family: inherit;"><span style="line-height: 18.3999996185303px;">V</span><sub style="line-height: 15.3333320617676px;">GS</sub></span> and the lower curves are for negative <span style="font-family: inherit;"><span style="line-height: 18.3999996185303px;">V</span><sub style="line-height: 15.3333320617676px;">GS</sub></span>. <span style="font-family: inherit;">The bottom drain curve is for </span><span style="line-height: 18.3999996185303px;">V</span><sub style="line-height: 18.3999996185303px;">GS</sub><span style="font-family: inherit;"> = </span><span style="line-height: 18.3999996185303px;">V</span><sub style="line-height: 18.3999996185303px;">GS(OFF)</sub><span style="font-family: inherit;">.</span><br />
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<img alt="Drain Characteristics of MOSFETs" border="0" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEj1qbslO_0rX08t6cpHEEWnFN9fsjlcXLh6YL4VylSbMdMSGnMREU5O3eGr4lMtD7JWFoR7hSQC5GIUVOJT3CkzOsEZBbhGzMrV02HkOw_kAuMoDifWLtzvB9FIxEA8jEOpq-aIqYeWPvXr/s1600/DE-MOSFET-Drain-Charecteristics.jpg" title="Drain Characteristics of MOSFETs" /></div>
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For a specified drain-source voltage<span style="font-family: inherit; text-align: left;"> </span><span style="line-height: 18.3999996185303px; text-align: left;">V</span><sub style="line-height: 18.3999996185303px; text-align: left;">DS</sub><span style="font-family: inherit; text-align: left;">, </span><span style="line-height: 18.3999996185303px; text-align: left;">V</span><sub style="line-height: 18.3999996185303px; text-align: left;">GS(OFF)</sub><span style="font-family: inherit; text-align: left;"> is the gate-source voltage at which drain current reduces to a certain specified negligibly small value</span><span style="text-align: left;">, as shown in Fig. 1.4. This voltage corresponds to the pinch-off voltage Vp of JFET. For </span><span style="line-height: 18.3999996185303px; text-align: left;">V</span><sub style="line-height: 15.3333320617676px; text-align: left;">GS</sub><span style="text-align: left;"> between </span><span style="font-family: inherit; text-align: left;"><span style="line-height: 18.3999996185303px;">V</span><sub style="line-height: 15.3333320617676px;">GS(OFF)</sub></span><span style="text-align: left;"> and zero, the device operates in </span><i style="text-align: left;">depletion-mode</i><span style="text-align: left;"> while for </span><span style="line-height: 18.3999996185303px; text-align: left;"><span style="font-family: inherit;">V<sub>GS</sub></span></span><span style="text-align: left;"> exceeding zero the device operates in </span><i style="text-align: left;">enhancement mode</i><span style="text-align: left;">. These drain curves again display an ohmic region. MOSFET has two major applications: a constant current source  and a voltage variable resistor.</span></div>
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The <b><i>transfer</i></b> (or <b><i>transconductance</i></b>) <b><i>characteristics</i></b> for an N-channel DE-MOSFET is shown in Fig. 1.5. <span style="font-family: inherit;"><span style="line-height: 18.3999996185303px;">I</span><sub style="line-height: 15.3333320617676px;">DSS</sub></span> is the drain current with a shorted gate. Since the curve  extends to the right of the origin, <span style="font-family: inherit;"><span style="line-height: 18.3999996185303px;">I</span><sub style="line-height: 15.3333320617676px;">DSS</sub></span> is no longer the maximum possible drain current. Mathematically, the curve is still part of a parabola and the same square-law relation exists as with a JFET. In fact, the depletion-mode MOSFET has a drain current given by the <b><i>transconductance equation</i></b>:</div>
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<span style="line-height: 18.3999996185303px;"><span style="font-family: inherit;"><b>I<sub>D</sub> = I<sub>DSS</sub> ( 1 - V<sub>GS </sub>/ V<sub>GS(OFF)</sub>)<sup>2</sup></b></span></span><br />
<span style="line-height: 18.3999996185303px;"><span style="font-family: inherit;"><b><sup><br /></sup></b></span></span></div>
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<img alt="Transfer Characteristics of MOSFETs" border="0" src="https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEhvOtyodvPYsXNgd0hjOxzb62QDSB2M2a5ZF8Kg05ZrOTSU_PnxzIUPonU31nSUe34UEVhWDdrUofB2m4iYS_o7qCfUleI-d53uek7XYriPicf2RwPdqadwQgzGJNQIGEKjG6gj3nxusxLT/s1600/DE-MOSFET-Transfer-Characteristics.jpg" title="Transfer Characteristics of MOSFETs" /></div>
<span style="line-height: 18.3999996185303px;"><span style="font-family: inherit;"><b><sup><br /></sup></b></span></span></div>
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Furthermore, it has the same equivalent circuits as a JFET. Because of this,the analysis of a depletion-mode MOSFET circuit is almost identical to that of a JFET circuit. The only difference is the analysis for a positive gate, but even here the same basic  formulas are used to determine the drain current <span style="line-height: 18.3999996185303px;">I</span><sub style="line-height: 15.3333320617676px;">D</sub>, gate-source voltage <span style="font-family: inherit;"><span style="line-height: 18.3999996185303px;">V</span><sub style="line-height: 15.3333320617676px;">GS</sub></span> etc.</div>
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The foregoing discussion is applicable in principle also to the P-channel DE-MOSFET. For such a device the sign of all currents and voltages in the characteristics must be reversed.</div>
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Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs)

The Metal Oxide Semiconductor Field Effect Transistor or MOSFET is one of the most widely used electronic devices, particularly in dig...

Junction Field-Effect Transistors (JFETs)

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<span style="font-family: inherit; text-align: justify;">The </span><b style="font-family: inherit; text-align: justify;">Field Effect Transistor</b><span style="font-family: inherit; text-align: justify;">, or simply</span><span style="font-family: inherit; text-align: justify;"> </span><b style="font-family: inherit; text-align: justify;">FET</b><span style="font-family: inherit; text-align: justify;"> </span><span style="font-family: inherit; text-align: justify;">however, uses the voltage that is applied to their input terminal, called the Gate to control the current flowing through them resulting in the output current being proportional to the input voltage. As their operation relies on an electric field (hence the name field effect) generated by the input Gate voltage, this then makes the Field Effect Transistor a “VOLTAGE” operated device.</span><br />

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<span style="font-family: inherit;">The Field Effect Transistor is a three terminal unipolar semiconductor device that has very similar characteristics to those of their Bipolar Transistor counterparts ie, high efficiency, instant operation, robust and cheap and can be used in most electronic circuit applications to replace their equivalent bipolar junction transistors (BJT) cousins.</span><br />
<span style="font-family: inherit;"><br />Field effect transistors can be made much smaller than an equivalent BJT transistor and along with their low power consumption and power dissipation makes them ideal for use in integrated circuits such as the CMOS range of digital logic chips.</span><br />
<span style="font-family: inherit;"><br />We remember from the previous tutorials that there are two basic types of Bipolar Transistor Construction, NPN and PNP, which basically describes the physical arrangement of the P-type and N-type semiconductor materials from which they are made. This is also true of FET’s as there are also two basic classifications of Field Effect Transistor, called the N-channel FET and the P-channel FET.</span><br />
<span style="font-family: inherit;"><br />The field effect transistor is a three terminal device that is constructed with no PN-junctions within the main current carrying path between the Drain and the Source terminals, which correspond in function to the Collector and the Emitter respectively of the bipolar transistor. The current path between these two terminals is called the “channel” which may be made of either a P-type or an N-type semiconductor material.</span><br />
<span style="font-family: inherit;"><br />The control of current flowing in this channel is achieved by varying the voltage applied to the Gate. As their name implies, Bipolar Transistors are “Bipolar” devices because they operate with both types of charge carriers, Holes and Electrons. The Field Effect Transistor on the other hand is a “Unipolar” device that depends only on the conduction of electrons (N-channel) or holes (P-channel).</span><br />
<span style="font-family: inherit;"><br />The Field Effect Transistor has one major advantage over its standard bipolar transistor cousins, in that their input impedance, ( Rin ) is very high, (thousands of Ohms), while the BJT is comparatively low. This very high input impedance makes them very sensitive to input voltage signals, but the price of this high sensitivity also means that they can be easily damaged by static electricity.</span><br />
<span style="font-family: inherit;"><br />There are two main types of field effect transistor, the <b>Junction Field Effect Transistor</b> or <b>JFET</b> and the <b>Insulated-gate Field Effect Transistor</b> or <b>IGFET</b>, which is more commonly known as the standard Metal-Oxide- Semiconductor Field-Effect Transistor or MOSFET for short.</span><br />
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<b><u><span style="font-family: inherit;">The Junction Field Effect Transistor</span></u></b></h4>
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<span style="font-family: inherit;">We saw previously that a bipolar junction transistor is constructed using two PN-junctions in the main current carrying path between the Emitter and the Collector terminals. The Junction Field Effect Transistor (JFET) has no PN-junctions but instead has a narrow piece of high resistivity semiconductor material forming a “Channel” of either N-type or P-type silicon for the majority carriers to flow through with two ohmic electrical connections at either end commonly called the Drain and the Source respectively.</span></div>
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<span style="font-family: inherit;">There are two basic configurations of junction field effect transistor, the N-channel JFET and the P-channel JFET. The N-channel JFET’s channel is doped with donor impurities meaning that the flow of current through the channel is negative (hence the term N-channel) in the form of electrons.</span></div>
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<span style="font-family: inherit;">Likewise, the P-channel JFET’s channel is doped with acceptor impurities meaning that the flow of current through the channel is positive (hence the term P-channel) in the form of holes. N-channel JFET’s have a greater channel conductivity (lower resistance) than their equivalent P-channel types, since electrons have a higher mobility through a conductor compared to holes. This makes the N-channel JFET’s a more efficient conductor compared to their P-channel counterparts.</span></div>
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<span style="font-family: inherit;">We have said previously that there are two ohmic electrical connections at either end of the channel called the Drain and the Source. But within this channel there is a third electrical connection which is called the Gate terminal and this can also be a P-type or N-type material forming a PN-junction with the main channel. The relationship between the connections of a junction field effect transistor and a bipolar junction transistor are compared below.</span></div>
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<b><span style="font-family: inherit;">Comparison of Connections between a JFET and a BJT</span></b></div>
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<table border="1" class="table1" style="background-color: #fcfcfc; border-collapse: collapse; border-spacing: 0px; border: 1px solid rgb(80, 120, 180); box-sizing: border-box; color: #333333; font-family: 'Open Sans', Arial, Helvetica, sans-serif; font-size: 13px; line-height: 18.5714302062988px; margin: 10px auto 20px; max-width: 100%;"><tbody style="box-sizing: border-box;">
<tr class="blue" style="background-color: #d3e0ea; box-sizing: border-box; color: #5078b4; font-size: 1.1em; font-weight: 600; line-height: 1.6em; margin: 0px; padding: 0px; text-align: center;"><td style="box-sizing: border-box; padding: 4px 0px; width: 170px;"><span style="font-family: inherit;">Bipolar Transistor</span></td><td style="box-sizing: border-box; padding: 4px 0px; width: 170px;"><span style="font-family: inherit;">Field Effect Transistor</span></td></tr>
<tr style="box-sizing: border-box; color: #5078b4; font-size: 1.1em; line-height: 1.6em; margin: 0px; padding: 0px; text-align: center;"><td colspan="2" style="box-sizing: border-box; padding: 4px 0px;"><span style="font-family: inherit;">Emitter – (E)     >>     Source – (S)</span></td></tr>
<tr style="box-sizing: border-box; color: #5078b4; font-size: 1.1em; line-height: 1.6em; margin: 0px; padding: 0px; text-align: center;"><td colspan="2" style="box-sizing: border-box; padding: 4px 0px;"><span style="font-family: inherit;">Base – (B)     >>     Gate – (G)</span></td></tr>
<tr style="box-sizing: border-box; color: #5078b4; font-size: 1.1em; line-height: 1.6em; margin: 0px; padding: 0px; text-align: center;"><td colspan="2" style="box-sizing: border-box; padding: 4px 0px;"><span style="font-family: inherit;">Collector – (C)     >>     Drain – (D)    </span></td></tr>
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<span style="font-family: inherit;">The symbols and basic construction for both configurations of JFETs are shown below.</span></div>
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<span style="font-family: inherit;"><img src="http://www.electronics-tutorials.ws/transistor/tran17.gif" /></span></div>
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<span style="font-family: inherit;">The semiconductor “channel” of the Junction Field Effect Transistor is a resistive path through which a voltage VDS causes a current ID to flow and as such the junction field effect transistor can conduct current equally well in either direction. As the channel is resistive in nature, a voltage gradient is thus formed down the length of the channel with this voltage becoming less positive as we go from the Drain terminal to the Source terminal.</span></div>
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<span style="font-family: inherit;">The result is that the PN-junction therefore has a high reverse bias at the Drain terminal and a lower reverse bias at the Source terminal. This bias causes a “depletion layer” to be formed within the channel and whose width increases with the bias.</span></div>
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<span style="font-family: inherit;">The magnitude of the current flowing through the channel between the Drain and the Source terminals is controlled by a voltage applied to the Gate terminal, which is a reverse-biased. In an N-channel JFET this Gate voltage is negative while for a P-channel JFET the Gate voltage is positive. The main difference between the JFET and a BJT device is that when the JFET junction is reverse-biased the Gate current is practically zero, whereas the Base current of the BJT is always some value greater than zero.</span></div>
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<b><span style="font-family: inherit;">Biasing of an N-channel JFET</span></b></div>
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<span style="font-family: inherit;"><img src="http://www.electronics-tutorials.ws/transistor/tran16.gif" /></span></div>
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<span style="font-family: inherit;">The cross sectional diagram above shows an N-type semiconductor channel with a P-type region called the Gate diffused into the N-type channel forming a reverse biased PN-junction and it is this junction which forms the depletion region around the Gate area when no external voltages are applied. JFETs are therefore known as depletion mode devices.</span></div>
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<span style="font-family: inherit;">This depletion region produces a potential gradient which is of varying thickness around the PN-junction and restrict the current flow through the channel by reducing its effective width and thus increasing the overall resistance of the channel itself.</span></div>
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<span style="font-family: inherit;">Then we can see that the most-depleted portion of the depletion region is in between the Gate and the Drain, while the least-depleted area is between the Gate and the Source. Then the JFET’s channel conducts with zero bias voltage applied (ie, the depletion region has near zero width).</span></div>
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<span style="font-family: inherit;">With no external Gate voltage ( VG = 0 ), and a small voltage ( VDS ) applied between the Drain and the Source, maximum saturation current ( IDSS ) will flow through the channel from the Drain to the Source restricted only by the small depletion region around the junctions.</span></div>
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<span style="font-family: inherit;">If a small negative voltage ( -VGS ) is now applied to the Gate the size of the depletion region begins to increase reducing the overall effective area of the channel and thus reducing the current flowing through it, a sort of “squeezing” effect takes place. So by applying a reverse bias voltage increases the width of the depletion region which in turn reduces the conduction of the channel.</span></div>
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<span style="font-family: inherit;">Since the PN-junction is reverse biased, little current will flow into the gate connection. As the Gate voltage ( -VGS ) is made more negative, the width of the channel decreases until no more current flows between the Drain and the Source and the FET is said to be “pinched-off” (similar to the cut-off region for a BJT). The voltage at which the channel closes is called the “pinch-off voltage”, ( VP ).</span></div>
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<b><span style="font-family: inherit;">JFET Channel Pinched-off</span></b></div>
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<span style="font-family: inherit;">In this pinch-off region the Gate voltage, VGS controls the channel current and VDS has little or no effect.</span></div>
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<span style="font-family: inherit;">The result is that the FET acts more like a voltage controlled resistor which has zero resistance when VGS = 0 and maximum “ON” resistance ( RDS ) when the Gate voltage is very negative. Under normal operating conditions, the JFET gate is always negatively biased relative to the source.</span></div>
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<span style="font-family: inherit;">It is essential that the Gate voltage is never positive since if it is all the channel current will flow to the Gate and not to the Source, the result is damage to the JFET. Then to close the channel:</span></div>
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<ul>
<li><span style="font-family: inherit;">No Gate voltage ( VGS ) and VDS is increased from zero.</span></li>
<li><span style="font-family: inherit;">No VDS and Gate control is decreased negatively from zero.</span></li>
<li><span style="font-family: inherit;">VDS and VGS varying.</span></li>
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<span style="font-family: inherit;">The P-channel Junction Field Effect Transistor operates the same as the N-channel above, with the following exceptions: 1). Channel current is positive due to holes, 2). The polarity of the biasing voltage needs to be reversed.</span></div>
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<span style="font-family: inherit;">The output characteristics of an N-channel JFET with the gate short-circuited to the source is given as</span></div>
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<b><span style="font-family: inherit;">Output characteristic V-I curves of a typical junction FET</span></b></div>
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<span style="font-family: inherit;"><img src="http://www.electronics-tutorials.ws/transistor/tran18.gif" /></span></div>
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<span style="font-family: inherit;">The voltage VGS applied to the Gate controls the current flowing between the Drain and the Source terminals. VGS refers to the voltage applied between the Gate and the Source while VDS refers to the voltage applied between the Drain and the Source.</span></div>
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<span style="font-family: inherit;">Because a Junction Field Effect Transistor is a voltage controlled device, “NO current flows into the gate!” then the Source current ( IS ) flowing out of the device equals the Drain current flowing into it and therefore ( ID = IS ).</span></div>
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<span style="font-family: inherit;">The characteristics curves example shown above, shows the four different regions of operation for a JFET and these are given as:</span></div>
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<ul>
<li><span style="font-family: inherit;"><u>Ohmic Region</u> – When VGS = 0 the depletion layer of the channel is very small and the JFET acts like a voltage controlled resistor.</span></li>
<li><span style="font-family: inherit;"><u>Cut-off Region</u> – This is also known as the pinch-off region were the Gate voltage, VGS is sufficient to cause the JFET to act as an open circuit as the channel resistance is at maximum.</span></li>
<li><span style="font-family: inherit;"><u>Saturation or Active Region</u> – The JFET becomes a good conductor and is controlled by the Gate-Source voltage, ( VGS ) while the Drain-Source voltage, ( VDS ) has little or no effect.</span></li>
<li><span style="font-family: inherit;"><u>Breakdown Region</u> – The voltage between the Drain and the Source, ( VDS ) is high enough to causes the JFET’s resistive channel to break down and pass uncontrolled maximum current.</span></li>
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<span style="font-family: inherit;">The characteristics curves for a P-channel junction field effect transistor are the same as those above, except that the Drain current ID decreases with an increasing positive Gate-Source voltage,VGS.</span></div>
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<span style="font-family: inherit;">The Drain current is zero when VGS = VP. For normal operation, VGS is biased to be somewhere between VP and 0. Then we can calculate the Drain current, ID for any given bias point in the saturation or active region as follows:</span></div>
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<b><span style="font-family: inherit;">Drain current in the active region</span></b></div>
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<span style="font-family: inherit;">Note that the value of the Drain current will be between zero (pinch-off) and IDSS (maximum current). By knowing the Drain current ID and the Drain-Source voltage VDS the resistance of the channel ( ID ) is given as:</span></div>
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<b><span style="font-family: inherit;">Drain-Source channel resistance</span></b></div>
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<span style="font-family: inherit;"><img src="http://www.electronics-tutorials.ws/transistor/tran52.gif" /></span></div>
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<span style="font-family: inherit;">Where: gm is the “transconductance gain” since the JFET is a voltage controlled device and which represents the rate of change of the Drain current with respect to the change in Gate-Source voltage.</span></div>
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<b><u><span style="font-family: inherit;">Modes of FET’s</span></u></b></h4>
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<span style="font-family: inherit;">Like the bipolar junction transistor, the field effect transistor being a three terminal device is capable of three distinct modes of operation and can therefore be connected within a circuit in one of the following configurations.</span></div>
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<b><span style="font-family: inherit;">Common Source (CS) Configuration</span></b></div>
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<span style="font-family: inherit;">In the Common Source configuration (similar to common emitter), the input is applied to the Gate and its output is taken from the Drain as shown. This is the most common mode of operation of the FET due to its high input impedance and good voltage amplification and as such Common Source amplifiers are widely used.</span></div>
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<span style="font-family: inherit;">The common source mode of FET connection is generally used audio frequency amplifiers and in high input impedance pre-amps and stages. Being an amplifying circuit, the output signal is 180o “out-of-phase” with the input.</span></div>
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<b><span style="font-family: inherit;">Common Gate (CG) Configuration</span></b></div>
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<span style="font-family: inherit;"><img src="http://www.electronics-tutorials.ws/transistor/tran73.gif" /></span></div>
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<span style="font-family: inherit;">In the Common Gate configuration (similar to common base), the input is applied to the Source and its output is taken from the Drain with the Gate connected directly to ground (0v) as shown. The high input impedance feature of the previous connection is lost in this configuration as the common gate has a low input impedance, but a high output impedance.</span></div>
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<span style="font-family: inherit;">This type of FET configuration can be used in high frequency circuits or in impedance matching circuits were a low input impedance needs to be matched to a high output impedance. The output is “in-phase” with the input.</span></div>
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<b><span style="font-family: inherit;">Common Drain (CD) Configuration</span></b></div>
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<span style="font-family: inherit;"><img src="http://www.electronics-tutorials.ws/transistor/tran74.gif" /></span></div>
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<span style="font-family: inherit;">In the Common Drain configuration (similar to common collector), the input is applied to the Gate and its output is taken from the Source. The common drain or “source follower” configuration has a high input impedance and a low output impedance and near-unity voltage gain so is therefore used in buffer amplifiers. The voltage gain of the source follower configuration is less than unity, and the output signal is “in-phase”, 0o with the input signal.</span></div>
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<span style="font-family: inherit;">This type of configuration is referred to as “Common Drain” because there is no signal available at the drain connection, the voltage present, +VDD just provides a bias. The output is in-phase with the input.</span></div>
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<b><u><span style="font-family: inherit;">The JFET Amplifier</span></u></b></h4>
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<span style="font-family: inherit;">Just like the bipolar junction transistor, JFET’s can be used to make single stage class A amplifier circuits with the JFET common source amplifier and characteristics being very similar to the BJT common emitter circuit. The main advantage JFET amplifiers have over BJT amplifiers is their high input impedance which is controlled by the Gate biasing resistive network formed by R1 and R2 as shown.</span></div>
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<b><span style="font-family: inherit;">Biasing of JFET Amplifier</span></b></div>
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<span style="font-family: inherit;"><img src="http://www.electronics-tutorials.ws/transistor/tran53.gif" /></span></div>
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<span style="font-family: inherit;">This common source (CS) amplifier circuit is biased in class “A” mode by the voltage divider network formed by resistors R1 and R2. The voltage across the Source resistor RS is generally set to be about one quarter of VDD, ( VDD /4 ). The required Gate voltage can then be calculated using this RS value. Since the Gate current is zero, ( IG = 0 ) we can set the required DC quiescent voltage by the proper selection of resistors R1 and R2.</span></div>
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<span style="font-family: inherit;">The control of the Drain current by a negative Gate potential makes the Junction Field Effect Transistor useful as a switch and it is essential that the Gate voltage is never positive for an N-channel JFET as the channel current will flow to the Gate and not the Drain resulting in damage to the JFET. The principals of operation for a P-channel JFET are the same as for the N-channel JFET, except that the polarity of the voltages need to be reversed.</span></div>
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Junction Field-Effect Transistors (JFETs)

The Field Effect Transistor , or simply FET however, uses the voltage that is applied to their input terminal, called the Gate to ...

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Bipolar Junction Transistors (BJTs)

Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs)

Junction Field-Effect Transistors (JFETs)

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