The Insulated-Gate Bipolar Transistor (IGBT) is a three-terminal power semiconductor device primarily used as an electronic switch which, as it was developed, came to combine high efficiency and fast switching. The IGBT combines the simple gate-drive characteristics of MOSFETs with the high-current and low-saturation-voltage capability of bipolar transistors.

Fig 1. IGBT Symbol

Constructional Features of an IGBT

Vertical cross section of a n channel IGBT cell is shown in Fig 2. Although p channel IGBTs are possible n channel devices are more common and will be the one discussed in this article.

Fig 2. Vertical cross section of an IGBT cell

The major difference with the corresponding MOSFET cell structure lies in the addition of a p+ injecting layer. This layer forms a pn junction with the drain layer and injects minority carriers into it. The n type drain layer itself may have two different doping levels. The lightly doped n- region is called the drain drift region. Doping level and width of this layer sets the forward blocking voltage (determined by the reverse break down voltage of J2) of the device. However, it does not affect the on state voltage drop of the device due to conductivity modulation as discussed in connection with the power diode. This construction of the device is called “Punch Trough” (PT) design. The Non-Punch Through (NPT) construction does not have this added n+ buffer layer. The PT construction does offer lower on state voltage drop compared to the NPT construction particularly for lower voltage rated devices. However, it does so at the cost of lower reverse break down voltage for the device, since the reverse break down voltage of the junction J1 is small. The rest of the construction of the device is very similar to that of a vertical MOSFET including the insulated gate structure and the shorted body (p type) – emitter (n+ type) structure. The doping level and physical geometry of the p type body region however, is considerably different from that of a MOSFET in order to defeat the latch up action of a parasitic thyristor embedded in the IGBT structure. A large number of basic cells as shown in Fig 2 are grown on a single silicon wafer and connected in parallel to form a complete IGBT device.

The IGBT cell has a parasitic p-n-p-n thyristor structure embedded into it as shown in Fig 3(a). The constituent p-n-p transistor, n-p-n transistor and the driver MOSFET are shown by dotted lines in this figure. Important resistances in the current flow path are also indicated.

Fig 3. Parasitic thyristor in an IGBT cell.
 (a) Schematic structure
(b) Exact equivalent circuit.
(c) Approximate equivalent circuit

Fig 3(b) shows the exact static equivalent circuit of the IGBT cell structure. The top p-n-p transistor is formed by the p+ injecting layer as the emitter, the n type drain layer as the base and the p type body layer as the collector. The lower n-p-n transistor has the n+ type source, the type body and the n type drain as the emitter, base and collector respectively. The base of the lower n-p-n transistor is shorted to the emitter by the emitter metallization. However, due to imperfect shorting, the exact equivalent circuit of the IGBT includes the body spreading resistance between the base and the emitter of the lower n-p-n transistor. If the output current is large enough, the voltage drop across this resistance may forward bias the lower n-p-n transistor and initiate the latch up process of the p-n-p-n thyristor structure. Once this structure latches up the gate control of IGBT is lost and the device is destroyed due to excessive power loss.

A major effort in the development of IGBT has been towards prevention of latch up of the parasitic thyristor. This has been achieved by modifying the doping level and physical geometry of the body region. The modern IGBT is latch-up proof for all practical purpose. Fig 4(a) and (b) shows the circuit symbol and photograph of an IGBT.

Fig 4. Circuit symbol of an IGBT.
(a) Circuit symbol.
(b) Photograph.

Operating principle of an IGBT

Operating principle of an IGBT can be explained in terms of the schematic cell structure and equivalent circuit of Fig 3(a) and (c). From the input side the IGBT behaves essentially as a MOSFET. Therefore, when the gate emitter voltage is less then the threshold voltage no inversion layer is formed in the p type body region and the device is in the off state. The forward voltage applied between the collector and the emitter drops almost entirely across the junction J2. Very small leakage current flows through the device under this condition. In terms of the equivalent current of Fig 3(c), when the gate emitter voltage is lower than the threshold voltage the driving MOSFET of the Darlington configuration remains off and hence the output p-n-p transistor also remains off.

When the gate emitter voltage exceeds the threshold, an inversion layer forms in the p type body region under the gate. This inversion layer (channel) shorts the emitter and the drain drift layer and an electron current flows from the emitter through this channel to the drain drift region. This in turn causes substantial hole injection from the p+ type collector to the drain drift region. A portion of these holes recombine with the electrons arriving at the drain drift region through the channel. The rest of the holes cross the drift region to reach the p type body where they are collected by the source metallization.

From the above discussion it is clear that the n type drain drift region acts as the base of the output p-n-p transistor. The doping level and the thickness of this layer determines the current gain “∝” of the p-n-p transistor. This is intentionally kept low so that most of the device current flows through the MOSFET and not the output p-n-p transistor collector. This helps to reduced the voltage drop across the “body” spreading resistance shown in Fig 3 (b) and eliminate the possibility of static latch up of the IGBT.

The total on state voltage drop across a conducting IGBT has three components. The voltage drop across J1 follows the usual exponential law of a pn junction. The next component of the voltage drop is due to the drain drift region resistance. This component in an IGBT is considerably lower compared to a MOSFET due to strong conductivity modulation by the injected minority carriers from the collector. This is the main reason for reduced voltage drop across an IGBT compared to an equivalent MOSFET. The last component of the voltage drop across an IGBT is due to the channel resistance and its magnitude is equal to that of a comparable MOSFET.

Steady state characteristics of an IGBT

The i-v characteristics of an n channel IGBT is shown in Fig 5 (a). They appear qualitatively similar to those of a logic level BJT except that the controlling parameter is not a base current but the gate-emitter voltage.

Fig 5. Static characteristics of an IGBT
 (a) Output characteristics; (b) Transfer characteristics

When the gate emitter voltage is below the threshold voltage only a very small leakage current flows though the device while the collector – emitter voltage almost equals the supply voltage (point C in Fig 5(a)). The device, under this condition is said to be operating in the cut off region. The maximum forward voltage the device can withstand in this mode (marked VCES in Fig 5(a)) is determined by the avalanche break down voltage of the body – drain p-n junction. Unlike a BJT, however, this break down voltage is independent of the collector current as shown in Fig 7.4(a). IGBTs of Non-punch through design can block a maximum reverse voltage ( VRM ) equal to VCES in the cut off mode. However, for Punch Through IGBTs  VRM is negligible (only a few tens of volts) due the presence of the heavily doped n+ drain buffer layer.

As the gate emitter voltage increases beyond the threshold voltage the IGBT enters into the active region of operation. In this mode, the collector current ic is determined by the transfer characteristics of the device as shown in Fig 5(b). This characteristic is qualitatively similar to that of a power MOSFET and is reasonably linear over most of the collector current range. The ratio of  ic to ( VgE –  VgE(th) ) is called the forward transconductance ( gfs ) of the device and is an important parameter in the gate drive circuit design. The collector emitter voltage, on the other hand, is determined by the external load line ABC as shown in Fig 5(a).

As the gate emitter voltage is increased further ic also increases and for a given load resistance (RLVCE decreases. At one point VCE becomes less than VgE – VgE(th). Under this condition the driving MOSFET part of the IGBT (Fig 3(c)) enters into the ohmic region and drives the output p-n-p transistor to saturation. Under this condition the device is said to be in the saturation mode. In the saturation mode the voltage drop across the IGBT remains almost constant reducing only slightly with increasing VgE.

In power electronic applications an IGBT is operated either in the cut off or in the saturation region of the output characteristics. Since VCE decreases with increasing VgE, it is desirable to use the maximum permissible value of VgE in the ON state of the device. VgE(Max) is limited by the maximum collector current that should be permitted to flow in the IGBT as dictated by the “latch-up” condition discussed earlier. Limiting VgE also helps to limit the fault current through the device. If a short circuit fault occurs in the load resistance RL (shown in the inset of Fig 5(a)) the fault load line is given by CF. Limiting VgE to VgE6 restricts the fault current corresponding to the operating point F. Most IGBTs are designed to with stand this fault current for a few microseconds within which the device must be turned off to prevent destruction of the device.

It is interesting to note that an IGBT does not exibit a BJT-like second break down failure. Since, in an IGBT most of the collector current flows through the drive MOSFET with positive temperature coefficient the effective temperature coefficient of VCE in an IGBT is slightly positive. This helps to prevent second break down failure of the device and also facilitates paralleling of IGBTs.

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